# I am the Watcher. I am your guide through this vast new twtiverse.
# 
# Usage:
#     https://watcher.sour.is/api/plain/users              View list of users and latest twt date.
#     https://watcher.sour.is/api/plain/twt                View all twts.
#     https://watcher.sour.is/api/plain/mentions?uri=:uri  View all mentions for uri.
#     https://watcher.sour.is/api/plain/conv/:hash         View all twts for a conversation subject.
# 
# Options:
#     uri     Filter to show a specific users twts.
#     offset  Start index for quey.
#     limit   Count of items to return (going back in time).
# 
# twt range = 1 1
# self = https://watcher.sour.is/conv/ulxkekq
SiFive adds mid-range Essential 6-Series RISC-V cores, including two Linux-ready models
SiFive announced a “21G3” release of its RISC-V cores, including a new, embedded focused “Essential 6-Series” featuring the Linux-ready, 64-bit U64 and a similar U64-MC designed for quad-core SoCs. Leading RISC-V core and SoC vendor SiFive, which last week unveiled a Cortex-A77 like SiFive Performance P650 core for up to 16-core SoCs, has released a […] ⌘ Read more